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  On-board processing using reconfigurable hardware on the solar orbiter PHI instrument

Lange, T., Fiethe, B., Michel, H., Michalik, H., Albert, K., & Hirzberger, J. (2017). On-board processing using reconfigurable hardware on the solar orbiter PHI instrument. In NASA/ESA Conference on Adaptive Hardware and Systems (pp. 186-191).

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 Creators:
Lange, T, Author
Fiethe, B, Author
Michel, H, Author
Michalik, H, Author
Albert, Kinga1, Author           
Hirzberger, Johann1, Author           
Affiliations:
1Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society, ou_1832289              

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 Abstract: Radiation-tolerant Field-Programmable Gate Arrays (FPGAs) enable efficient and high-reliable data processing for scientific space missions at the drawback of highly complex and customized FPGA designs. This paper describes the design of a simple but efficient and flexible FPGA architecture as accelerator for data processing. It combines the performance of an FPGA implementation with the flexibility of software realizations. The efficient coupling of FPGA or ASIC accelerators to general-purpose processors (GPPs) is currently a general problem, for which our proposed architecture provides a dedicated solution. This is exemplarily implemented for the image data pre-processing on the in-flight reconfigurable, power-efficient and radiation-tolerant data processing module developed for the Solar Orbiter PHI instrument.

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Language(s): eng - English
 Dates: 2017
 Publication Status: Issued
 Pages: -
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 Table of Contents: -
 Rev. Type: Peer
 Identifiers: DOI: 10.1109/AHS.2017.8046377
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Title: 2017 NASA/ESA Conference on Adaptive Hardware and Systems (AHS)
Place of Event: -
Start-/End Date: 2017-07-24 - 2017-07-26

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Title: NASA/ESA Conference on Adaptive Hardware and Systems
Source Genre: Proceedings
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Pages: - Volume / Issue: - Sequence Number: - Start / End Page: 186 - 191 Identifier: -