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Abstract:
Radiation-tolerant Field-Programmable Gate Arrays (FPGAs) enable efficient and high-reliable data processing for scientific space missions at the drawback of highly complex and customized FPGA designs. This paper describes the design of a simple but efficient and flexible FPGA architecture as accelerator for data processing. It combines the performance of an FPGA implementation with the flexibility of software realizations. The efficient coupling of FPGA or ASIC accelerators to general-purpose processors (GPPs) is currently a general problem, for which our proposed architecture provides a dedicated solution. This is exemplarily implemented for the image data pre-processing on the in-flight reconfigurable, power-efficient and radiation-tolerant data processing module developed for the Solar Orbiter PHI instrument.