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  Performance Evaluation of Large Scale Electron Dynamics Simulation under Many-core Cluster based on Knights Landing

Hirokawa, Y., Boku, T., Sato, S., & Yabana, K. (2018). Performance Evaluation of Large Scale Electron Dynamics Simulation under Many-core Cluster based on Knights Landing. In Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2018) (pp. 183-191). New York: ACM. doi:10.1145/3149457.3149465.

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p183-hirokawa.pdf (Verlagsversion), 418KB
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2018
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Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for third-party components of this work must be honored. For all other uses, contact the owner/author(s).
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https://dx.doi.org/10.1145/3149457.3149465 (Verlagsversion)
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 Urheber:
Hirokawa, Y.1, Autor
Boku, T.2, Autor
Sato, S.3, Autor           
Yabana, K.2, Autor
Affiliations:
1Graduate School of Systems and Information Engineering, University of Tsukuba, ou_persistent22              
2Center for Computational Sciences, University of Tsukuba, ou_persistent22              
3Theory Group, Theory Department, Max Planck Institute for the Structure and Dynamics of Matter, Max Planck Society, ou_2266715              

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Schlagwörter: Intel Xeon Phi, Knights Landing, Electron Dynamics Simulation
 Zusammenfassung:

We have been developing an advanced scientific code called "ARTED" for an electron dynamics simulation using the first-order computation of materials to be ported to various large-scale parallel systems including the "K" Computer, which was previously Japan's fastest supercomputer. In this paper, the implementation and performance evaluation of the ARTED code used in Intel's latest many-core processor, the Knights Landing (KNL) stand-alone cluster, are described based on past research on porting the code to the Knights Corner (KNC) accelerator. Our target system is Oakforest-PACS, which is currently the fastest supercomputer in Japan. For performance tuning on KNL, the largest issue is how to utilize multiple levels of parallelism, such as the instruction level (512-bit SIMD instruction), hardware thread (4 threads/core), and large number of cores. We focus on the dominant computation part of the code, where 25 points of a 3D stencil computation are required.

We successfully optimize this part to achieve 758.4 GFLOPS per node, which corresponds to 24.8% of the theoretical peak on the node of Oakforest-PACS using an Intel Xeon Phi 7250 (3046 GFLOPS peak). It is also shown that the KNL sustained performance is better than that of the two KNC accelerator cards. The entire ARTED code implies other time step computing, and was designed for a large-scale parallel execution using MPI, whereas single-node parallelization is achieved using OpenMP. We finally evaluate the entire parallel execution performance with up to 128 nodes.

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Sprache(n): eng - English
 Datum: 20182018
 Publikationsstatus: Erschienen
 Seiten: 9
 Ort, Verlag, Ausgabe: -
 Inhaltsverzeichnis: -
 Art der Begutachtung: Interne Begutachtung
 Identifikatoren: DOI: 10.1145/3149457.3149465
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Veranstaltung

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Titel: International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia)
Veranstaltungsort: Tokyo, Japan
Start-/Enddatum: 2018-01-28 - 2018-01-31

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Titel: Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region (HPC Asia 2018)
Genre der Quelle: Konferenzband
 Urheber:
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Ort, Verlag, Ausgabe: New York : ACM
Seiten: - Band / Heft: - Artikelnummer: - Start- / Endseite: 183 - 191 Identifikator: -