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  A 130 nm CMOS PLL for Phase-II ATLAS-MDT TDC

Pipino, A., Matteis, M. D., Resta, F., Baschirotto, A., Kroha, H., Richter, R., et al. (2019). A 130 nm CMOS PLL for Phase-II ATLAS-MDT TDC. Proceedings of Science, 092.

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Item Permalink: https://hdl.handle.net/21.11116/0000-0005-D6A3-1 Version Permalink: https://hdl.handle.net/21.11116/0000-0005-D6A4-0
Genre: Conference Paper

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https://publications.mppmu.mpg.de/2018/MPP-2018-359/FullText.docx (Any fulltext)
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 Creators:
Pipino, Alessandra1, Author
Matteis, Marcello De1, Author
Resta, Federica1, Author
Baschirotto, Andrea1, Author
Kroha, Hubert1, Author
Richter, Robert1, Author
Kortner, Oliver1, Author
Zhu, Junjie1, Author
Wang, Jinhong1, Author
Affiliations:
1Max Planck Institute for Physics, Max Planck Society and Cooperation Partners, ou_2253650              

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Free keywords: ATLAS
 Abstract: The high luminosity and interaction rate expected from the planned High Luminosity-Large Hadron Collider (HL-LHC) upgrade require a replacement and improvement of the ATLAS Muon-Drift-Tube (MDT) read-out electronics. This paper presents a Phase Locked Loop (PLL) intended to be used inside the improved Time-to-Digital Converter (TDC), which digitizes the arrival time and charge amplitude information. Starting from a 40 MHz input clock, the PLL provides output clocks of 160 MHz and 320 MHz with a phase resolution of 11.25° and 22.5°, respectively. The prototype, integrated in 130 nm CMOS technology, has 0.02mm2 of area and 1.2 V of supply voltage.

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 Dates: 2019
 Publication Status: Issued
 Pages: -
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 Rev. Type: -
 Identifiers: Other: MPP-2018-359
URI: https://publications.mppmu.mpg.de/?action=search&mpi=MPP-2018-359
DOI: 10.22323/1.343.0092
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Title: Proceedings of Science
  Abbreviation : PoS
Source Genre: Journal
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Pages: - Volume / Issue: - Sequence Number: - Start / End Page: 092 Identifier: -

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Title: TWEPP 2018
Source Genre: Proceedings
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Pages: - Volume / Issue: - Sequence Number: - Start / End Page: 092 Identifier: -