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  Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance

Függer, M., Kinali, A., Lenzen, C., & Wiederhake, B. (2022). Fast All-Digital Clock Frequency Adaptation Circuit for Voltage Droop Tolerance. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 41(8), 2518-2531. doi:10.1109/TCAD.2021.3097599.

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Item Permalink: https://hdl.handle.net/21.11116/0000-0009-201C-4 Version Permalink: https://hdl.handle.net/21.11116/0000-000A-D218-E
Genre: Journal Article

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Fast_All-Digital_Clock_Frequency_Adaptation_Circuit_for_Voltage_Droop_Tolerance.pdf (Publisher version), 2MB
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This work is licensed under a Creative Commons Attribution 4.0 License. For more information, see https://creativecommons.org/licenses/by/4.0/
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 Creators:
Függer, Matthias1, Author
Kinali, Attila2, Author           
Lenzen, Christoph2, Author           
Wiederhake, Ben2, Author           
Affiliations:
1External Organizations, ou_persistent22              
2Algorithms and Complexity, MPI for Informatics, Max Planck Society, ou_24019              

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Language(s): eng - English
 Dates: 20212022
 Publication Status: Issued
 Pages: -
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 Table of Contents: -
 Rev. Type: -
 Identifiers: BibTex Citekey: Fuegger2021
DOI: 10.1109/TCAD.2021.3097599
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Project name : ToRH
Grant ID : 716562
Funding program : Horizon 2020 (H2020)
Funding organization : European Commission (EC)

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Title: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Source Genre: Journal
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Publ. Info: Piscataway, NJ : IEEE
Pages: 14 p. Volume / Issue: 41 (8) Sequence Number: - Start / End Page: 2518 - 2531 Identifier: ISSN: 0278-0070
CoNE: https://pure.mpg.de/cone/journals/resource/954925505281