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Conference Paper

Performance Analysis of the SO/PHI Software Framework for On-board Data Reduction

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Albert,  Kinga
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

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Hirzberger,  Johann
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

Busse,  D.
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

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Castellanos Durán,  Juan Sebastian
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

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Gandorfer,  Achim M.
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

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Kolleck,  Martin
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

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Lagg,  Andreas
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

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Solanki,  Sami K.
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

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Woch,  Joachim
Department Sun and Heliosphere, Max Planck Institute for Solar System Research, Max Planck Society;

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Citation

Albert, K., Hirzberger, J., Busse, D., Blanco Rodriguez, J., Castellanos Durán, J. S., Cobos Carrascosa, J. P., et al. (2019). Performance Analysis of the SO/PHI Software Framework for On-board Data Reduction. In P. J. Teuben, M. W. Pound, B. A. Thomas, & E. M. Warner (Eds.), Astronomical Data Analysis Software and Systems XXVIII (pp. 151-154). San Francisco: Astronomical Society of the Pacific.


Cite as: http://hdl.handle.net/21.11116/0000-0005-588D-A
Abstract
The Polarimetric and Helioseismic Imager (PHI) is the first deep-space solar spectropolarimeter, on-board the Solar Orbiter (SO) space mission. It faces: stringent requirements on science data accuracy, a dynamic environment, and severe limitations on telemetry volume. SO/PHI overcomes these restrictions through on-board instrument calibration and science data reduction, using dedicated firmware in FPGAs. This contribution analyses the accuracy of a data processing pipeline by comparing the results obtained with SO/PHI hardware to a reference from a ground computer. The results show that for the analyzed pipeline the error introduced by the firmware implementation is well below the requirements of SO/PHI.