Use of scanning capacitance microscopy for controlling wafer processing

Jeandupeux, O.; Marsico, V.; Acovic, A.; Fazan, P.; Brune, H.; Kern, K.

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Use of scanning capacitance microscopy for controlling wafer processing

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Kern, K.
Department Nanoscale Science (Klaus Kern), Max Planck Institute for Solid State Research, Max Planck Society;

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Jeandupeux, O., Marsico, V., Acovic, A., Fazan, P., Brune, H., & Kern, K. (2002). Use of scanning capacitance microscopy for controlling wafer processing. Microelectronics Reliability, 42(2), 225-231.

Cite as: https://hdl.handle.net/21.11116/0000-000E-E3C3-5

Abstract

Scanning capacitance microscopy and electrostatic force
microscopy have been used to characterize commercial
semiconductor devices at various stages of the fabrication
process. These methods, combined with conventional atomic force
microscopy, allow to visualize qualitatively the oxide
thickness, the nature of dopants and the exact position of
implanted areas. (C) 2002 Elsevier Science Ltd. All rights
reserved.