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Abstract

An array of DEPFET pixels is one of several concepts to implement an active pixel sensor. Similar to PNCCD and SDD detectors, the typically 450 μm-thick silicon sensor is fully depleted by the principle of sideward depletion. They have furthermore in common to be back-illuminated detectors, which allows for ultrathin and homogeneous photon entrance windows. This enables relatively high quantum efficiencies at low energies and close to 100% for photon energies between 1 and 10 keV. Steering of the DEPFET sensor is enabled by the so-called Switcher ASIC, and readout is performed by, e.g., a VERITAS ASIC. The configuration enables a readout time of a few microseconds per row. This results in full frame readout times of a few milliseconds for a 512 × 512 pixel array in a rolling shutter mode. The read noise is then typically three electrons equivalent noise charge RMS. DEPFET detectors can be applied in particular for spectroscopy in the energy band from 0.2 to 20 keV. For example, an energy resolution of about 130 eV FWHM is achieved at an energy of 6 keV which is close to the theoretical limit given by Fano noise. Pixel sizes of a few tens of microns up to a centimeter are feasible by the DEPFET concept.