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Journal Article

Nonlinear Contact Effects in Staggered Thin-Film Transistors

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Kraft,  U.
Max Planck Institute for Solid State Research, Stuttgart, Germany;
Tech Univ Bergakad Freiberg, Freiberg, Germany;
Stanford Univ, Dept Elect Engn, Stanford, CA, USA;
Univ Cambridge, Cavendish Lab, Cambridge, England;
Lise Meitner Group Kraft: Organic Bioelectronics, MPI for Polymer Research, Max Planck Society;
Dept. Blom: Molecular Electronics, MPI for Polymer Research, Max Planck Society;

/persons/resource/persons280151

Klauk,  H.
Research Group Organic Electronics (Hagen Klauk), Max Planck Institute for Solid State Research, Max Planck Society;

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Citation

Fischer, A., Zundorf, H., Kaschura, F., Widmer, J., Leo, K., Kraft, U., et al. (2017). Nonlinear Contact Effects in Staggered Thin-Film Transistors. Physical Review Applied, 8(5): 054012.


Cite as: https://hdl.handle.net/21.11116/0000-000E-D4B8-3
Abstract
The static and dynamic electrical characteristics of thin-film transistors (TFTs) are often limited by the parasitic contact resistances, especially for TFTs with a small channel length. For the smallest possible contact resistance, the staggered device architecture has a general advantage over the coplanar architecture of a larger injection area. Since the charge transport occurs over an extended area, it is inherently more difficult to develop an accurate analytical device model for staggered TFTs. Most analytical models for staggered TFTs, therefore, assume that the contact resistance is linear, even though this is commonly accepted not to be the case. Here, we introduce a semiphenomenological approach to accurately fit experimental data based on a highly discretized equivalent network circuit explicitly taking into account the inherent nonlinearity of the contact resistance. The model allows us to investigate the influence of nonlinear contact resistances on the static and dynamic performance of staggered TFTs for different contact layouts with a relatively short computation time. The precise extraction of device parameters enables us to calculate the transistor behavior as well as the potential for optimization in real circuits.