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Thesis

Generating Code from Abstract VHDL Models

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Abdel Maksoud,  Mohamed
International Max Planck Research School, MPI for Informatics, Max Planck Society;

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Abdel Maksoud, M. (2007). Generating Code from Abstract VHDL Models. Master Thesis, Universität des Saarlandes, Saarbrücken.


Cite as: https://hdl.handle.net/11858/00-001M-0000-0027-D127-5
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