Influence of Free Layer Surface Roughness on Magnetic and Electrical Properties 
of 300 mm CMOS-compatible MTJ Stacks

Durner, Christoph; Lederer, Maximilian; Gurieva, Tatiana; Hertel, Johannes; Hindenberg, Meike; Gerlich, Lukas; Wagner-Reetz, Maik; Parkin, Stuart

doi:10.1109/TMAG.2023.3287134

Item

ITEM ACTIONSEXPORT

Add to Basket

Local TagsRelease HistoryDetailsSummary

Released

Journal Article

Influence of Free Layer Surface Roughness on Magnetic and Electrical Properties of 300 mm CMOS-compatible MTJ Stacks

MPS-Authors

/persons/resource/persons291467

Durner, Christoph
Nano-Systems from Ions, Spins and Electrons, Max Planck Institute of Microstructure Physics, Max Planck Society;

/persons/resource/persons245678

Parkin, Stuart
Nano-Systems from Ions, Spins and Electrons, Max Planck Institute of Microstructure Physics, Max Planck Society;

External Resource

https://doi.org/10.1109/TMAG.2023.3287134
(Publisher version)

Fulltext (restricted access)

There are currently no full texts shared for your IP range.

Fulltext (public)

There are no public fulltexts stored in PuRe

Supplementary Material (public)

There is no public supplementary material available

Citation

Durner, C., Lederer, M., Gurieva, T., Hertel, J., Hindenberg, M., Gerlich, L., et al. (2023). Influence of Free Layer Surface Roughness on Magnetic and Electrical Properties of 300 mm CMOS-compatible MTJ Stacks. IEEE Transactions on Magnetics, 59(11): 4400404. doi:10.1109/TMAG.2023.3287134.

Cite as: https://hdl.handle.net/21.11116/0000-000D-8CA8-8

Abstract

The magnetic tunnel junction (MTJ) is a highly versatile device widely used in today’s spintronic applications such as magnetoresistive random-access memory (MRAM), magnetic sensors and prospectively as a read device in racetrack memory. Tuning the perpendicular (p-)MTJ stack to match the desired properties, such as tunnel magnetoresistance (TMR), magnetic anisotropies or coercive field of the free layer, requires careful optimization of the deposition parameters as well as precise layer thickness control. Here, the deposition of individual layers in a wedged manner across 300 mm wafers is proposed to engineer the thicknesses within the stack more efficiently. Furthermore, this technique provides detailed insights into effects related to surface roughness, magnetic anisotropy and TMR.